msc: batch 16 files (36568 KB) @ 2026-08-03T19:53:56Z

registry/events/acct4_w3_Interactive-184222db8f.jsonl

@@ -9,3 +9,4 @@
 {"run_id": "p1-resnet56-cifar100-base-s1", "state": "oracle_done", "account": "acct4", "worker_id": 3, "session_id": "Interactive-184222db8f", "updated_at": "2026-08-03T19:35:03Z", "ts": 1785785703.794868, "arch": "resnet56", "seed": 1, "sample_order_hash": "80031c23f8300724c6fbc588e4bccbe41c6392041782148727bb497b0132c4ad"}
 {"run_id": "p1-resnet8x4-cifar100-base-s3", "state": "oracle_done", "account": "acct4", "worker_id": 3, "session_id": "Interactive-184222db8f", "updated_at": "2026-08-03T19:38:41Z", "ts": 1785785921.0727534, "arch": "resnet8x4", "seed": 3, "sample_order_hash": "80031c23f8300724c6fbc588e4bccbe41c6392041782148727bb497b0132c4ad"}
 {"run_id": "p1-shufflenetv2-cifar100-base-s1", "state": "oracle_done", "account": "acct4", "worker_id": 3, "session_id": "Interactive-184222db8f", "updated_at": "2026-08-03T19:45:02Z", "ts": 1785786302.2086349, "arch": "shufflenetv2", "seed": 1, "sample_order_hash": "80031c23f8300724c6fbc588e4bccbe41c6392041782148727bb497b0132c4ad"}
+{"run_id": "p1-vgg13-cifar100-base-s3", "state": "oracle_done", "account": "acct4", "worker_id": 3, "session_id": "Interactive-184222db8f", "updated_at": "2026-08-03T19:49:03Z", "ts": 1785786543.5587058, "arch": "vgg13", "seed": 3, "sample_order_hash": "80031c23f8300724c6fbc588e4bccbe41c6392041782148727bb497b0132c4ad"}

runs/p1-wrn_40_1-cifar100-base-s1/per_sample/meta.json

@@ -0,0 +1,154 @@
+{
+  "run_id": "p1-wrn_40_1-cifar100-base-s1",
+  "arch": "wrn_40_1",
+  "family": "wrn",
+  "dataset": "cifar100",
+  "seed": 1,
+  "sample_order_hash": "80031c23f8300724c6fbc588e4bccbe41c6392041782148727bb497b0132c4ad",
+  "config_hash": "e66d87e9632e8743a445c394cc39812c3778d1dd366acd2a1c46f9a7c7a9b994",
+  "budgets": {
+    "depth": {
+      "configs": [
+        "d1",
+        "d2",
+        "d3",
+        "d4",
+        "d5"
+      ],
+      "K": 5,
+      "fractions": [
+        0.2222222222222222,
+        0.3888888888888889,
+        0.6111111111111112,
+        0.7777777777777778,
+        1.0
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+      "requested_fractions": [
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+        0.4,
+        0.6,
+        0.8,
+        1.0
+      ],
+      "stage_cuts": [
+        4,
+        7,
+        11,
+        14,
+        18
+      ],
+      "n_blocks": 18,
+      "feature_dims": [
+        16,
+        32,
+        32,
+        64,
+        64
+      ],
+      "flops": [
+        39193792,
+        65755520,
+        103766400,
+        130126592,
+        168006400
+      ],
+      "rho": [
+        0.23328749380975963,
+        0.3913869947811512,
+        0.6176336139575636,
+        0.7745335415793684,
+        1.0
+      ],
+      "note": "prefix backbone + linear exit head; forward_prefix stops early. K is adaptive: a backbone with fewer blocks than requested exits carries fewer distinct depth budgets."
+    },
+    "resolution": {
+      "configs": [
+        "r16",
+        "r20",
+        "r24",
+        "r28",
+        "r32"
+      ],
+      "values": [
+        16,
+        20,
+        24,
+        28,
+        32
+      ],
+      "flops": [
+        42015232,
+        65641600,
+        94518272,
+        128645248,
+        168022528
+      ],
+      "rho": [
+        0.2500571351955852,
+        0.390671422346413,
+        0.5625333288640914,
+        0.7656428547486204,
+        1.0
+      ],
+      "native_supported": true,
+      "native_error": null,
+      "note": "cost measured at NATIVE input size where the architecture tolerates it; otherwise an analytic quadratic-in-r model. The proxy sweep (downsample-then-upsample to 32px) shares this cost table and is labelled idealised."
+    },
+    "precision": {
+      "configs": [
+        "int4",
+        "int6",
+        "int8",
+        "fp16",
+        "fp32"
+      ],
+      "bits": [
+        4,
+        6,
+        8,
+        16,
+        32
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+      "flops": [
+        21002816,
+        31504224,
+        42005632,
+        84011264,
+        168022528
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+      "rho": [
+        0.125,
+        0.1875,
+        0.25,
+        0.5,
+        1.0
+      ],
+      "note": "analytic bit-operation model rho = bits/32. INT4/INT6 are simulated by fake quantisation; no T4 kernel exists to time. Never reported as measured latency."
+    }
+  },
+  "full_flops": 168022528,
+  "exit_count": 5,
+  "resolutions": [
+    16,
+    20,
+    24,
+    28,
+    32
+  ],
+  "precisions": [
+    "int4",
+    "int6",
+    "int8",
+    "fp16",
+    "fp32"
+  ],
+  "tau_grid": [
+    0.0,
+    0.1,
+    0.2,
+    0.3,
+    0.5
+  ],
+  "created_utc": "2026-08-03T19:53:56Z",
+  "msc_lib_version": "1.0.0"
+}

runs/p1-wrn_40_1-cifar100-base-s1/per_sample/test.parquet

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runs/p1-wrn_40_1-cifar100-base-s1/per_sample/train_holdout.parquet

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